← IGCSE Computer Science Paper 1

Fetch: incrementing the PC and copying the instruction to the CIR

End of fetch: the PC is increased by 1 so it points to the next instruction, and the instruction held in the MDR is copied to the CIR, ready to be decoded.

Part of: IGCSE Computer Science 0478 — 3.1 Computer Architecture — Module 21

Understanding Fetch: incrementing the PC and copying the instruction to the CIR in IGCSE Computer Science Paper 1

What it does: Adding 1 to the PC makes it point to the next address. Without this step the CPU would fetch the same instruction again. The CIR holds the instruction currently being decoded and executed. Copying it there frees the MDR for the next data transfer. The PC is incremented (PC ← PC + 1) so the CPU knows where the next instruction is stored. The instruction is copied from the MDR to the CIR (CIR ← MDR). The MAR only holds addresses. The PC is increased by 1 and the instruction in the MDR is copied into the CIR. PC ← PC + 1 means 7 becomes 8. The PC counts upwards, not downwards.

Common mistakes: The PC must be incremented, not decremented, so it points to the next instruction. It should be PC ← PC + 1. The fetched instruction is copied from the MDR to the CIR, not the other way round. It should be CIR ← MDR.

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This module's key terms are also in a printable crossword (Modules 228–239) and word search (Modules 218–239).

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Learning
Duo
What happens to the PC at the end of the fetch stage?
It is incremented by 1 to point to the next instructionIt is cleared back to 0 ready for the next program
Matches
MDR ← CIR
↓
The copy goes the wrong way. The instruction must be copied from the MDR into the CIR, not from the CIR into the MDR.
Applying
Meanings
Term
PC ← PC + 1; CIR ← MDR
Meaning
End of fetch: the PC is increased by 1 so it points to the next instruction, and the instruction held in the MDR is copied to the CIR, ready to be decoded.
Practice
PC ← PC + 1
Testing
Gaps
PC ← PC 1
Check Answer
Spots
2MDR ← RAM[MAR]
3PC ← PC - 1

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Quick Questions

1. What happens to the PC at the end of the fetch stage?
A. It is incremented by 1 to point to the next instruction ✓
B. It is cleared back to 0 ready for the next program
The PC is incremented (PC ← PC + 1) so the CPU knows where the next instruction is stored.
2. Which register copies the instruction from the MDR during the fetch stage?
A. CIR ✓
B. MAR
The instruction is copied from the MDR to the CIR (CIR ← MDR). The MAR only holds addresses.
3. Which line correctly shows the end of the fetch stage?
A. PC ← PC + 1; CIR ← MDR ✓
B. MDR ← PC + 1; CIR ← MAR
The PC is increased by 1 and the instruction in the MDR is copied into the CIR.
4. Why is the PC incremented during the fetch stage?
A. So it can store the result of the current instruction
B. So it holds the address of the next instruction to be fetched ✓
The PC never stores results. It always holds the address of the next instruction, so it must be updated.
5. True or false: the instruction is copied from the MDR to the CIR before it is decoded.
A. False
B. True ✓
The CIR holds the current instruction so the control unit can decode it in the next stage.

Match the Pairs

PC ← PC + 1 → Increase the program counter by 1 so it holds the address of the next instruction to fetch
CIR ← MDR → Copy the fetched instruction from the memory data register into the current instruction register
The PC is incremented during fetch so the CPU knows where the next instruction is stored → PC ← PC + 1
The fetched instruction moves from the MDR to the CIR so it is ready to be decoded → CIR ← MDR
MDR ← CIR → The copy goes the wrong way. The instruction must be copied from the MDR into the CIR, not from the CIR into the MDR.
PC ← PC - 1 → The PC is decreased instead of increased, so it would point to the previous instruction and the program would not move forward.

Key Term

PC ← PC + 1; CIR ← MDR
End of fetch: the PC is increased by 1 so it points to the next instruction, and the instruction held in the MDR is copied to the CIR, ready to be decoded.

Fill in the Blanks

1. PC ← PC + 1
Hint: Type the arithmetic operator that moves the PC on to the next instruction address.
2. CIR ← MDR
Hint: Type the register that holds the instruction just fetched from RAM.
3. PC ← PC + 1
Hint: Type the register that stores the address of the next instruction and is incremented during fetch.
4. PC ← PC + 1 CIR ← MDR
Hint: Type the register that receives the instruction so it is ready to be decoded.
5. PC ← PC + 1 CIR ← MDR
Hint: Type the assignment symbol that stores the new value back into the PC.

Spot the Error

Question 1
A MAR ← PC
B MDR ← RAM[MAR]
C PC ← PC - 1
D CIR ← MDR
Line C — The PC must be incremented, not decremented, so it points to the next instruction. It should be PC ← PC + 1.
Question 2
A MAR ← PC
B MDR ← RAM[MAR]
C MDR ← CIR
D PC ← PC + 1
Line C — The fetched instruction is copied from the MDR to the CIR, not the other way round. It should be CIR ← MDR.
Question 3
A MAR ← MAR + 1
B CIR ← MDR
C DECODE CIR
Line A — It is the PC that is incremented to point at the next instruction, not the MAR. It should be PC ← PC + 1.
Question 4
A MAR ← PC
B MDR ← RAM[MAR]
C ACC ← MDR
D PC ← PC + 1
Line C — The instruction is copied into the CIR, which holds the current instruction. The ACC holds calculation results. It should be CIR ← MDR.
Question 5
A MDR ← CIR
B PC ← PC + 1
C DECODE CIR
Line A — The copy goes from the MDR into the CIR so the instruction can be decoded. It should be CIR ← MDR.

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