Fetch: incrementing the PC and copying the instruction to the CIR
Name:
Date:
Class:
A
Quick Questions
Shade in the A or B circle for each question.
1. What happens to the PC at the end of the fetch stage?
2. Which register copies the instruction from the MDR during the fetch stage?
3. Which line correctly shows the end of the fetch stage?
4. Why is the PC incremented during the fetch stage?
5. True or false: the instruction is copied from the MDR to the CIR before it is decoded.
B
Match the Pairs
Draw a line connecting each item on the left to its match on the right.
| Left column | Right column | |
|---|---|---|
| 1PC ← PC + 1 | ACopy the fetched instruction from the memory data register into the current instruction register | |
| 2CIR ← MDR | BThe copy goes the wrong way. The instruction must be copied from the MDR into the CIR, not from the CIR into the MDR. | |
| 3The PC is incremented during fetch so the CPU knows where the next instruction is stored | CCIR ← MDR | |
| 4The fetched instruction moves from the MDR to the CIR so it is ready to be decoded | DPC ← PC + 1 | |
| 5MDR ← CIR | EIncrease the program counter by 1 so it holds the address of the next instruction to fetch | |
| 6PC ← PC - 1 | FThe PC is decreased instead of increased, so it would point to the previous instruction and the program would not move forward. |
C
Definitions
PC ← PC + 1; CIR ← MDR
D
Fill in the Blanks
Complete each line of code by filling in the missing parts.
1.
PC ← PC _ 1
2.
CIR ← ___
3.
__ ← PC + 1
4.
PC ← PC + 1
___ ← MDR
5.
PC _ PC + 1
CIR ← MDR
E
Spot the Error
Shade in the letter of the line that contains an error.
Question 1
A
MAR ← PC
B
MDR ← RAM[MAR]
C
PC ← PC - 1
D
CIR ← MDR
Question 2
A
MAR ← PC
B
MDR ← RAM[MAR]
C
MDR ← CIR
D
PC ← PC + 1
Question 3
A
MAR ← MAR + 1
B
CIR ← MDR
C
DECODE CIR
Question 4
A
MAR ← PC
B
MDR ← RAM[MAR]
C
ACC ← MDR
D
PC ← PC + 1
Question 5
A
MDR ← CIR
B
PC ← PC + 1
C
DECODE CIR
Answer Key
Fetch: incrementing the PC and copying the instruction to the CIR
Section A: Quick Questions
Q1
A — It is incremented by 1 to point to the next instruction
Q2
A — CIR
Q3
A — PC ← PC + 1; CIR ← MDR
Q4
B — So it holds the address of the next instruction to be fetched
Q5
B — True
Section B: Match the Pairs
Q1
PC ← PC + 1 → Increase the program counter by 1 so it holds the address of the next instruction to fetch
Q2
CIR ← MDR → Copy the fetched instruction from the memory data register into the current instruction register
Q3
The PC is incremented during fetch so the CPU knows where the next instruction is stored → PC ← PC + 1
Q4
The fetched instruction moves from the MDR to the CIR so it is ready to be decoded → CIR ← MDR
Q5
MDR ← CIR → The copy goes the wrong way. The instruction must be copied from the MDR into the CIR, not from the CIR into the MDR.
Q6
PC ← PC - 1 → The PC is decreased instead of increased, so it would point to the previous instruction and the program would not move forward.
Section C: Definitions
Q1
PC ← PC + 1; CIR ← MDR — End of fetch: the PC is increased by 1 so it points to the next instruction, and the instruction held in the MDR is copied to the CIR, ready to be decoded.Section D: Fill in the Blanks
Q1
PC ← PC + 1Q2
CIR ← MDRQ3
PC ← PC + 1Q4
PC ← PC + 1
CIR ← MDRQ5
PC ← PC + 1
CIR ← MDRSection E: Spot the Error
Q1
C — The PC must be incremented, not decremented, so it points to the next instruction. It should be PC ← PC + 1.
Q2
C — The fetched instruction is copied from the MDR to the CIR, not the other way round. It should be CIR ← MDR.
Q3
A — It is the PC that is incremented to point at the next instruction, not the MAR. It should be PC ← PC + 1.
Q4
C — The instruction is copied into the CIR, which holds the current instruction. The ACC holds calculation results. It should be CIR ← MDR.
Q5
A — The copy goes from the MDR into the CIR so the instruction can be decoded. It should be CIR ← MDR.