IGCSE Computer Science Paper 1 Definitions Worksheet: 3.1 Computer Architecture (Modules 228–239)
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Key terms
Write what each term means, in your own words.
1
fetch-decode-execute cycle
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MAR <- PC
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MDR <- RAM[MAR]
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PC ← PC + 1; CIR ← MDR
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Decode
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execute
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register trace
8
cache
9
CPU performance
10
instruction set
Answer Key
IGCSE Computer Science Paper 1 · Modules 228–239 · Student wording will vary for definitions
1fetch-decode-execute cycle — The CPU repeats three stages for every instruction: fetch it from RAM, decode what it means, then execute it. The cycle then starts again with the next instruction.
2MAR <- PC — At the start of fetch, the address held in the PC is copied into the MAR. It then travels along the address bus to RAM. The PC still holds the address at this point, because it is copied, not moved.
3MDR <- RAM[MAR] — Fetch step: RAM finds the instruction at the address in the MAR (address bus), a read signal comes via the control bus, and the instruction travels on the data bus into the MDR.
4PC ← PC + 1; CIR ← MDR — End of fetch: the PC is increased by 1 so it points to the next instruction, and the instruction held in the MDR is copied to the CIR, ready to be decoded.
5Decode — The fetch-decode-execute stage where the control unit reads the instruction in the CIR and works out the operation to perform and the data (operand) it needs.
6execute — The stage of the fetch-decode-execute cycle where the decoded instruction is carried out, e.g. fetching data, calculating in the ALU, storing in the ACC, or changing the PC.
7register trace — Recording the contents of the PC, MAR, MDR, CIR and ACC, and the bus used, at each step as one instruction goes through the fetch-decode-execute cycle.
8cache — A small amount of very fast memory in or near the CPU that stores frequently used instructions and data, so the CPU can get them faster than from RAM.
9CPU performance — How fast a CPU runs programs. More cores, a bigger cache or a faster clock speed can raise it, but each has limits: software must split tasks, cache is costly, and a faster clock makes more heat.
10instruction set — The list of all the commands (such as load, add, store and jump) that a CPU design can process. The control unit decodes each instruction using it.