← IGCSE Computer Science Paper 1

Decode stage

The fetch-decode-execute stage where the control unit reads the instruction in the CIR and works out the operation to perform and the data (operand) it needs.

Part of: IGCSE Computer Science 0478 — 3.1 Computer Architecture — Module 22

Understanding Decode stage in IGCSE Computer Science Paper 1

What it does: ADD is the operation. The CU decodes it to know that an addition must be performed. The instruction set lists every command the CPU understands, so the CU matches the opcode in the CIR against it to work out the action. The control unit interprets the instruction during decode. The ALU only does calculations and logic during execute. The instruction is copied into the CIR at the end of fetch. The PC holds the address of the next instruction, not the instruction itself. The operation (opcode) says what to do. The operand is the data or the address of the data to use. Buses are the pathways that carry signals.

Common mistakes: The operation is the command to perform, here ADD. The 5 is the operand (the data). It should be operation <- 'ADD'. The CU uses the instruction set to understand what the command means. Cache size does not help it decode. It should be 'CU checks the instruction set'.

Class: _____________________ · Name: _____________________ · Date: _________

Free printable worksheet with full answer key — or add this module to a class and your students practise it interactively.

🖨 Print worksheet + answer key Add Decode stage to a class →

This module's key terms are also in a printable crossword (Modules 228–239) and word search (Modules 218–239).

Take this worksheet further — free with Cloodit

Each concept is reinforced from every angle — learned, then applied, then tested.

Learning

Duo

Which part of the CPU carries out the decode stage?

The arithmetic logic unit (ALU)The control unit (CU)

Matches

Decode: the ALU reads the CIR and works out the instruction

↓

The control unit decodes the instruction, not the ALU. The ALU only does arithmetic and logic during execute.

Applying

Meanings

Term

Decode

Meaning

The fetch-decode-execute stage where the control unit reads the instruction in the CIR and works out the operation to perform and the data (operand) it needs.

Practice

CIR ← LOAD 25

Testing

Gaps

The decodes the instruction in the CIR

Check Answer

Spots

1CIR <- 'ADD 5'

2operation <- '5'

Cloodit turns curriculum-aligned coding content into journeys students work through one biome at a time.

Students earn collectable badges

Over 100 of them, across seven natural biomes.

Study Buddy

Students build a real study resource

Turns their work into revision material ready for Flash Cards and Exam study.

Diamond Dash — one of Cloodit's live, competitive Sprint games

Students lock in with Sprints

Live, competitive practice for the start of the lesson or a teacher-led lesson finisher.

A Cloodit certificate of achievement, ready to personalise and print

Custom printable certificates

Honour your top performers, or encourage a student who's trying hard — ready to print in seconds.

Add to class →

Quick Questions

1. Which part of the CPU carries out the decode stage?

A. The control unit (CU) ✓

B. The arithmetic logic unit (ALU)

The control unit interprets the instruction during decode. The ALU only does calculations and logic during execute.

2. Where is the instruction held while it is being decoded?

A. The program counter (PC)

B. The current instruction register (CIR) ✓

The instruction is copied into the CIR at the end of fetch. The PC holds the address of the next instruction, not the instruction itself.

3. Which statement describes the decode stage correctly?

A. The CU works out what the instruction means and what data it needs ✓

B. The CU adds 1 to the PC and fetches the next instruction

Incrementing the PC happens during fetch. Decode is about interpreting the instruction in the CIR.

4. An instruction is made of two parts. What are they?

A. An operation and an operand ✓

B. An address bus and a data bus

The operation (opcode) says what to do. The operand is the data or the address of the data to use. Buses are the pathways that carry signals.

5. In the instruction ADD 5, which part is the operand?

A. ADD

B. 5 ✓

ADD is the operation, the action to perform. The operand 5 is the data the operation uses.

Match the Pairs

LDA 25 → An instruction made of an operation (LDA, load) and an operand (25) that the control unit works out during decode

CIR → CU → The decode stage: the control unit reads the instruction held in the current instruction register

The operation part of an instruction tells the CU what action to carry out → ADD 7 (operation = ADD)

The CU uses the instruction set to understand what a command in the CIR means → CU looks up opcode in instruction set

Decode: the ALU reads the CIR and works out the instruction → The control unit decodes the instruction, not the ALU. The ALU only does arithmetic and logic during execute.

Decode: the instruction is fetched from RAM into the MDR → This describes the fetch stage. Decode happens after fetch, when the CU works out the operation and operand from the CIR.

Key Term

Decode

The fetch-decode-execute stage where the control unit reads the instruction in the CIR and works out the operation to perform and the data (operand) it needs.

Fill in the Blanks

1. The CU decodes the instruction in the CIR

Hint: Type the abbreviation for the CPU component that interprets the instruction.

2. LDA 20 : operation = LDA, operand = 20

Hint: Type the word for the part of an instruction that is the data or address to use.

3. CU reads the CIR to decode the instruction

Hint: Type the abbreviation for the register that holds the instruction being decoded.

4. The CU uses the instruction set to decode

Hint: Type the name for the list of commands a CPU can understand.

5. Instruction: ADD 7 Operation: ADD Operand: 7

Hint: Type the operation, the part of the instruction that says what to do.

Spot the Error

Question 1

A CIR <- 'ADD 5'

B operation <- '5'

C operand <- 5

D CU decodes the CIR

Line B — The operation is the command to perform, here ADD. The 5 is the operand (the data). It should be operation <- 'ADD'.

Question 2

A Fetch puts instruction in CIR

B Decode begins

C CU reads the CIR

D CU checks the cache size

Line D — The CU uses the instruction set to understand what the command means. Cache size does not help it decode. It should be 'CU checks the instruction set'.

Question 3

A instruction <- CIR

B operation <- 'LOAD'

C operand <- 20

D RAM looks up the operation

Line D — The control unit, not RAM, looks up the operation to work out what it means. It should be 'CU looks up the operation'.

Question 4

A CU reads instruction from PC

B operation <- 'STORE'

C operand <- 50

Line A — The instruction to decode is held in the CIR. The PC only holds the address of the next instruction. It should be 'from CIR'.

Question 5

A CIR <- 'LOAD 40'

B operand <- 'LOAD'

C operation <- 'LOAD'

Line B — LOAD is the operation. The operand is the data or address the instruction needs, here 40. It should be operand <- 40 on that line's role, so operand <- 40.

Student with a class code? Join your class →