← IGCSE Computer Science Paper 1

Memory data register (MDR)

Memory Data Register: a CPU register that temporarily holds the data or instruction just fetched from RAM, or data about to be written to RAM. It holds data, not addresses.

Part of: IGCSE Computer Science 0478 — 3.1 Computer Architecture — Module 11

Understanding Memory data register (MDR) in IGCSE Computer Science Paper 1

What it does: Data and instructions pass through the MDR on the way between RAM and the rest of the CPU, so it acts as a buffer. The fetched instruction is held in the MDR and then copied into the Current Instruction Register ready for decoding. The MDR holds data or instructions. Addresses are held in the MAR (and the PC holds the address of the next instruction). The MDR holds data going either way: fetched from RAM or about to be written to RAM. MDR stands for Memory Data Register. It is named after the data it holds. The instruction is copied from the MDR to the CIR, where it is decoded.

Common mistakes: The PC holds an address, and the MDR holds data, not addresses. The address from the PC must go into the MAR: MAR ← PC. The fetched instruction waits in the MDR before it moves to the CIR. The MAR only holds an address. It should be CIR ← MDR.

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Learning
Duo
What does the MDR hold?
The data or instruction just fetched from RAM, or data about to be written to RAMThe address of the next instruction to be fetched
Matches
MDR holds the address of the next instruction
↓
The MDR holds data or instructions, not addresses. Addresses are held in the MAR (and the PC holds the address of the next instruction).
Applying
Meanings
Term
MDR
Meaning
Memory Data Register: a CPU register that temporarily holds the data or instruction just fetched from RAM, or data about to be written to RAM. It holds data, not addresses.
Practice
MAR ← PC
Testing
Gaps
← RAM[MAR]
Check Answer
Spots
1MDR ← PC
2MDR ← RAM[MAR]

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Quick Questions

1. What does the MDR hold?
A. The data or instruction just fetched from RAM, or data about to be written to RAM ✓
B. The address of the next instruction to be fetched
The MDR holds data or instructions. Addresses are held in the MAR (and the PC holds the address of the next instruction).
2. Which register holds a memory ADDRESS, not data?
A. MAR ✓
B. MDR
The MAR holds the address. The MDR holds the data stored at that address.
3. How does the MDR act between the CPU and RAM?
A. As a buffer: data waits in the MDR as it travels between them ✓
B. As a store for the memory addresses used by the CPU
The MDR is a temporary holding place (buffer) for data moving between the CPU and RAM.
4. During the fetch stage, where is the instruction placed first after it is read from RAM?
A. Straight into the CIR
B. In the MDR ✓
The instruction arrives in the MDR first, then it is copied to the CIR.
5. The MDR is used when data is being written to RAM as well as when it is being read from RAM.
A. False
B. True ✓
The MDR holds data going either way: fetched from RAM or about to be written to RAM.

Match the Pairs

MDR → Memory Data Register: a CPU register that temporarily holds the data or instruction just fetched from RAM, or data about to be written to RAM
MDR <- RAM[MAR] → The instruction or data stored at the address held in the MAR is copied from RAM into the MDR during the fetch stage
The MDR is a buffer between the CPU and RAM: everything travelling between them passes through it first → RAM -> MDR -> CPU
After a fetch, the instruction waits in the MDR and is then moved to the CIR to be decoded → CIR <- MDR
MDR holds the address of the next instruction → The MDR holds data or instructions, not addresses. Addresses are held in the MAR (and the PC holds the address of the next instruction).
MAR <- RAM[MDR] → The MDR cannot supply the address to RAM. The address must come from the MAR, and the fetched contents are then placed into the MDR.

Key Term

MDR
Memory Data Register: a CPU register that temporarily holds the data or instruction just fetched from RAM, or data about to be written to RAM. It holds data, not addresses.

Fill in the Blanks

1. MDR ← RAM[MAR]
Hint: Type the register that temporarily holds the data or instruction just fetched from RAM.
2. CIR ← MDR
Hint: Type the register that holds the fetched instruction before it is copied to the CIR.
3. MAR ← PC MDR ← RAM[MAR] CIR ← MDR
Hint: Type the register whose address value is used to locate the item in RAM.
4. RAM[MAR] ← MDR
Hint: Type the register that holds the data about to be written to memory.
5. // The MDR holds data, not addresses
Hint: Type the kind of value the MDR holds, as opposed to the memory locations held by the MAR.

Spot the Error

Question 1
A MDR ← PC
B MDR ← RAM[MAR]
C CIR ← MDR
Line A — The PC holds an address, and the MDR holds data, not addresses. The address from the PC must go into the MAR: MAR ← PC.
Question 2
A MAR ← PC
B MDR ← RAM[MAR]
C CIR ← MAR
D PC ← PC + 1
Line C — The fetched instruction waits in the MDR before it moves to the CIR. The MAR only holds an address. It should be CIR ← MDR.
Question 3
A MAR ← 120
B MDR ← RAM[MAR]
C ACC ← MAR
Line C — The data fetched from RAM is held in the MDR, so the ACC must receive it from the MDR. The MAR holds an address, not data. It should be ACC ← MDR.
Question 4
A MAR ← PC
B MDR ← RAM[MAR]
C PC ← PC + 1
D MDR ← CIR
Line D — The data flows the wrong way. In the fetch stage the instruction is copied from the MDR into the CIR, so it should be CIR ← MDR.
Question 5
A MAR ← 150
B ACC ← MDR
C RAM[MAR] ← MDR
Line B — Data about to be written to RAM is placed in the MDR first. The value must go from the ACC into the MDR, so it should be MDR ← ACC.

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