← IGCSE Computer Science Paper 1

Current instruction register (CIR)

Current Instruction Register: holds the instruction copied from the MDR while the control unit decodes it and the CPU executes it. It stores the instruction itself, not an address.

Understanding Current instruction register (CIR) in IGCSE Computer Science Paper 1

What it does: During the decode stage the control unit looks at the contents of the CIR to find out which operation is needed. The CIR stores a whole instruction such as LDA 25, while the MAR stores an address such as 25. During fetch, the instruction is read from RAM into the MDR and then copied from the MDR into the CIR. The CIR stores the instruction (for example, an opcode and operand). Addresses are held in the PC and the MAR. The address of the next instruction is held in the program counter (PC), not the CIR. Calculation results are held in the accumulator (ACC). The CIR holds the current instruction.

Common mistakes: The control unit decodes the instruction held in the CIR. The MAR only holds an address, so the line should be 'CU decodes the CIR'. The copy goes the wrong way. The instruction is copied from the MDR into the CIR, so it should be 'CIR <- MDR'.

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Learning
Duo
Which register holds the instruction that is currently being decoded and executed?
CIR (Current Instruction Register)PC (Program Counter)
Matches
The CIR stores the address of the next instruction to be fetched
↓
This describes the program counter (PC), not the CIR. The CIR stores the current instruction itself, not an address.
Applying
Meanings
Term
CIR
Meaning
Current Instruction Register: holds the instruction copied from the MDR while the control unit decodes it and the CPU executes it. It stores the instruction itself, not an address.
Practice
CIR ← MDR
Testing
Gaps
← MDR
Check Answer
Spots
3CIR <- MDR
4CU decodes the MAR

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Quick Questions

1. Which register holds the instruction that is currently being decoded and executed?
A. CIR (Current Instruction Register) ✓
B. PC (Program Counter)
The CIR holds the current instruction while it is decoded and executed. The PC holds the address of the next instruction.
2. Where does the CIR receive its instruction from?
A. The ALU
B. The MDR ✓
During fetch, the instruction is read from RAM into the MDR and then copied from the MDR into the CIR.
3. Which part of the CPU reads the contents of the CIR during the decode stage?
A. The address bus
B. The control unit (CU) ✓
The control unit reads the instruction in the CIR and decodes it so it knows what the CPU must do. A bus only carries signals and does not decode anything.
4. What does the CIR store?
A. The instruction itself ✓
B. The address of the instruction
The CIR stores the instruction (for example, an opcode and operand). Addresses are held in the PC and the MAR.
5. True or false: the CIR holds the address of the next instruction to be fetched.
A. False ✓
B. True
The address of the next instruction is held in the program counter (PC), not the CIR.

Match the Pairs

CIR → The Current Instruction Register, which holds the instruction that is currently being decoded and executed
MDR → CIR → The instruction fetched from RAM is copied from the MDR into the CIR, ready for the control unit to decode
The control unit reads the instruction stored in the CIR so it can decode it and work out what to do → CU decodes the instruction in the CIR
The CIR holds the instruction itself, not an address, so it is different from the MAR and the PC → CIR = LDA 25 (instruction) MAR = 25 (address)
The CIR stores the address of the next instruction to be fetched → This describes the program counter (PC), not the CIR. The CIR stores the current instruction itself, not an address.
RAM → CIR → MDR → The order is wrong. The instruction goes from RAM into the MDR first and is then copied from the MDR into the CIR.

Key Term

CIR
Current Instruction Register: holds the instruction copied from the MDR while the control unit decodes it and the CPU executes it. It stores the instruction itself, not an address.

Fill in the Blanks

1. MDR ← RAM[MAR] CIR ← MDR
Hint: Type the register that holds the instruction currently being decoded and executed.
2. MDR ← RAM[MAR] CIR ← MDR
Hint: Type the register that the fetched instruction is copied from.
3. PC ← PC + 1 CIR ← MDR DECODE(CIR)
Hint: Type the register the control unit reads during the decode stage.
4. The CIR stores the instruction , not an address
Hint: Type the kind of data the CIR holds, as opposed to a memory address.
5. The CU decodes the contents of the CIR
Hint: Type the abbreviation for the CPU component that reads the CIR to decode.

Spot the Error

Question 1
A MAR <- PC
B MDR <- RAM[MAR]
C CIR <- MDR
D CU decodes the MAR
Line D — The control unit decodes the instruction held in the CIR. The MAR only holds an address, so the line should be 'CU decodes the CIR'.
Question 2
A MDR <- RAM[MAR]
B PC <- PC + 1
C MDR <- CIR
Line C — The copy goes the wrong way. The instruction is copied from the MDR into the CIR, so it should be 'CIR <- MDR'.
Question 3
A CIR <- PC
B CU reads the CIR
C CU decodes the instruction
Line A — The PC holds the address of the next instruction, not the instruction. The CIR receives its instruction from the MDR: 'CIR <- MDR'.
Question 4
A MDR <- RAM[MAR]
B CIR <- MAR
C CU decodes CIR
Line B — The MAR holds an address, but the CIR holds an instruction. The CIR is loaded from the MDR: 'CIR <- MDR'.
Question 5
A MAR <- PC
B MDR <- RAM[MAR]
C CIR <- MDR
D CIR stores an address
Line D — The CIR stores the instruction itself, not an address. Addresses are held in the PC and MAR.

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