Current instruction register (CIR)

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Quick Questions

Shade in the A or B circle for each question.

1. Which register holds the instruction that is currently being decoded and executed?

A CIR (Current Instruction Register)

B PC (Program Counter)

2. Where does the CIR receive its instruction from?

A The ALU

B The MDR

3. Which part of the CPU reads the contents of the CIR during the decode stage?

A The address bus

B The control unit (CU)

4. What does the CIR store?

A The instruction itself

B The address of the instruction

5. True or false: the CIR holds the address of the next instruction to be fetched.

A False

B True

Match the Pairs

Draw a line connecting each item on the left to its match on the right.

Left column		Right column
1CIR		ACU decodes the instruction in the CIR
2MDR → CIR		BThe order is wrong. The instruction goes from RAM into the MDR first and is then copied from the MDR into the CIR.
3The control unit reads the instruction stored in the CIR so it can decode it and work out what to do		CThe Current Instruction Register, which holds the instruction that is currently being decoded and executed
4The CIR holds the instruction itself, not an address, so it is different from the MAR and the PC		DThis describes the program counter (PC), not the CIR. The CIR stores the current instruction itself, not an address.
5The CIR stores the address of the next instruction to be fetched		ECIR = LDA 25 (instruction) MAR = 25 (address)
6RAM → CIR → MDR		FThe instruction fetched from RAM is copied from the MDR into the CIR, ready for the control unit to decode

Definitions

CIR

Fill in the Blanks

Complete each line of code by filling in the missing parts.

MDR ← RAM[MAR] ___ ← MDR

MDR ← RAM[MAR] CIR ← ___

PC ← PC + 1 CIR ← MDR DECODE(___)

The CIR stores the ___________ , not an address

The __ decodes the contents of the CIR

Spot the Error

Shade in the letter of the line that contains an error.

Question 1

A MAR <- PC

B MDR <- RAM[MAR]

C CIR <- MDR

D CU decodes the MAR

Question 2

A MDR <- RAM[MAR]

B PC <- PC + 1

C MDR <- CIR

Question 3

A CIR <- PC

B CU reads the CIR

C CU decodes the instruction

Question 4

A MDR <- RAM[MAR]

B CIR <- MAR

C CU decodes CIR

Question 5

A MAR <- PC

B MDR <- RAM[MAR]

C CIR <- MDR

D CIR stores an address

Answer Key

Current instruction register (CIR)

Section A: Quick Questions

A — CIR (Current Instruction Register)

B — The MDR

B — The control unit (CU)

A — The instruction itself

A — False

Section B: Match the Pairs

CIR → The Current Instruction Register, which holds the instruction that is currently being decoded and executed

MDR → CIR → The instruction fetched from RAM is copied from the MDR into the CIR, ready for the control unit to decode

The control unit reads the instruction stored in the CIR so it can decode it and work out what to do → CU decodes the instruction in the CIR

The CIR holds the instruction itself, not an address, so it is different from the MAR and the PC → CIR = LDA 25 (instruction) MAR = 25 (address)

The CIR stores the address of the next instruction to be fetched → This describes the program counter (PC), not the CIR. The CIR stores the current instruction itself, not an address.

RAM → CIR → MDR → The order is wrong. The instruction goes from RAM into the MDR first and is then copied from the MDR into the CIR.

Section C: Definitions

CIR — Current Instruction Register: holds the instruction copied from the MDR while the control unit decodes it and the CPU executes it. It stores the instruction itself, not an address.

Section D: Fill in the Blanks

MDR ← RAM[MAR]
CIR ← MDR

MDR ← RAM[MAR]
CIR ← MDR

PC ← PC + 1
CIR ← MDR
DECODE(CIR)

The CIR stores the instruction
, not an address

The CU decodes the contents of the CIR

Section E: Spot the Error

D — The control unit decodes the instruction held in the CIR. The MAR only holds an address, so the line should be 'CU decodes the CIR'.

C — The copy goes the wrong way. The instruction is copied from the MDR into the CIR, so it should be 'CIR <- MDR'.

A — The PC holds the address of the next instruction, not the instruction. The CIR receives its instruction from the MDR: 'CIR <- MDR'.

B — The MAR holds an address, but the CIR holds an instruction. The CIR is loaded from the MDR: 'CIR <- MDR'.

D — The CIR stores the instruction itself, not an address. Addresses are held in the PC and MAR.