← IGCSE Computer Science Paper 1

Data bus

A set of wires that carries data and instructions in both directions between the CPU and RAM. It connects to the MDR.

Part of: IGCSE Computer Science 0478 — 3.1 Computer Architecture — Module 16

Understanding Data bus in IGCSE Computer Science Paper 1

What it does: During the fetch stage the instruction is sent from RAM along the data bus and arrives in the MDR. Reading moves values from RAM into the MDR and writing moves them from the MDR to RAM. Both use the data bus, which is why it is two-way. True. The data bus is the set of wires that moves data and instructions between the CPU and RAM. The data bus connects to the MDR. The MAR connects to the address bus, which carries the memory address. False. In the Von Neumann architecture, instructions are stored as data, so the data bus carries both.

Common mistakes: The data bus connects to the MDR, not the MAR. The MAR holds addresses and uses the address bus. The line should be Data bus -> MDR. The data bus is two-way. Data and instructions travel in both directions between the CPU and RAM, so directions should be 2.

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This module's key terms are also in a printable crossword (Modules 218–227) and word search (Modules 218–239).

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Learning
Duo
The data bus carries data and instructions between the CPU and RAM.
FalseTrue
Matches
The data bus carries only data, never instructions
↓
The data bus carries instructions as well as data. Instructions are fetched from RAM along it into the MDR.
Applying
Meanings
Term
data bus
Meaning
A set of wires that carries data and instructions in both directions between the CPU and RAM. It connects to the MDR.
Practice
// Data bus: two-way, CPU <-> RAM
Testing
Gaps
The data links the CPU and RAM
Check Answer
Spots
3Data bus carries instruction
4Data bus -> MAR

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Quick Questions

1. The data bus carries data and instructions between the CPU and RAM.
A. True ✓
B. False
True. The data bus is the set of wires that moves data and instructions between the CPU and RAM.
2. Which direction can the data bus carry signals?
A. Both directions (two-way) ✓
B. One direction only (CPU to RAM)
The data bus is two-way. Data is read from RAM into the CPU and written from the CPU back to RAM.
3. Which register does the data bus connect to in the CPU?
A. Memory address register (MAR)
B. Memory data register (MDR) ✓
The data bus connects to the MDR. The MAR connects to the address bus, which carries the memory address.
4. The data bus carries only data and never instructions.
A. False ✓
B. True
False. In the Von Neumann architecture, instructions are stored as data, so the data bus carries both.
5. Which bus carries the instruction from RAM to the CPU during the fetch stage?
A. Address bus
B. Data bus ✓
The data bus carries the instruction into the MDR. The address bus only carries the location to read from.

Match the Pairs

data bus → A set of wires that carries data and instructions between the CPU and RAM
MDR <-> Data bus <-> RAM → The data bus works in both directions: the MDR can send data to RAM or receive data from RAM
The data bus carries instructions as well as data, so a fetched instruction travels along it from RAM to the CPU → RAM --data bus--> MDR (instruction)
The data bus is two-way, so the CPU can both read from RAM and write to RAM → Read: RAM -> MDR | Write: MDR -> RAM
The data bus carries only data, never instructions → The data bus carries instructions as well as data. Instructions are fetched from RAM along it into the MDR.
The data bus is one-way: CPU -> RAM only → The data bus is two-way (bidirectional). It carries values from RAM to the CPU and from the CPU to RAM. Only the address bus is one-way.

Key Term

data bus
A set of wires that carries data and instructions in both directions between the CPU and RAM. It connects to the MDR.

Fill in the Blanks

1. The data bus links the CPU and RAM
Hint: Type the word for a set of wires that carries signals between components.
2. Data bus: two-way between CPU and RAM
Hint: Type the word describing the directions data can travel on this bus.
3. Data bus carries data and instructions
Hint: Type what else, besides data, travels along this bus when the CPU fetches from RAM.
4. RAM -> data bus -> MDR
Hint: Type the register that the data bus connects to inside the CPU.
5. Writing: MDR -> data bus -> RAM
Hint: Type the name of the bus that carries the contents being written to RAM, not the address.

Spot the Error

Question 1
A PC -> MAR via address bus
B RAM finds the address
C Data bus carries instruction
D Data bus -> MAR
Line D — The data bus connects to the MDR, not the MAR. The MAR holds addresses and uses the address bus. The line should be Data bus -> MDR.
Question 2
A bus <- 'data bus'
B directions <- 1
C joins <- 'CPU and RAM'
Line B — The data bus is two-way. Data and instructions travel in both directions between the CPU and RAM, so directions should be 2.
Question 3
A DATA BUS: one-way
B Links CPU and RAM
C Carries data and instructions
D Connects to the MDR
Line A — The data bus is two-way (bidirectional), not one-way. It should read DATA BUS: two-way.
Question 4
A CPU stores a result in RAM
B Result is in the MDR
C Data bus: RAM -> CPU
D RAM saves the value
Line C — When the CPU writes a result to RAM, the data bus carries it from the CPU to RAM. The line should be Data bus: CPU -> RAM.
Question 5
A IF reading from RAM THEN
B data bus: RAM -> CPU
C ELSE
D data bus: not used
Line D — The data bus is used for both reading and writing because it is two-way. When writing, it should be data bus: CPU -> RAM.

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