Writing exam answers about the CPU

Name:

Date:

Class:

Quick Questions

Shade in the A or B circle for each question.

1. Which sentence would earn the mark for the first step of the fetch stage?

A The address in the PC is copied to the MAR.

B The address in the PC is copied to the MDR.

2. Which answer uses the correct term for the bus that carries the location in RAM to be read?

A The address bus carries the memory address from the MAR to RAM.

B The data bus carries the memory address from the MAR to RAM.

3. Which describes the correct order of the FDE cycle in an exam answer?

A Decode, then fetch, then execute.

B Fetch, then decode, then execute.

4. Which statement is correct about the MDR in the fetch stage?

A The instruction read from RAM is placed in the MDR.

B The instruction read from RAM is placed in the MAR.

5. Which answer gives a full-mark reason for why more cores can improve performance?

A More cores make the computer faster because it has more cores.

B More cores can process more instructions at the same time, so more work is done.

Match the Pairs

Draw a line connecting each item on the left to its match on the right.

Left column		Right column
1PC → MAR		AThe instruction is read from memory into the memory data register, then copied to the current instruction register.
2RAM → MDR → CIR		BMixing up the MAR and MDR: the MAR holds the address, the MDR holds the data or instruction fetched from that address.
3The correct order of the stages in the cycle must be given in a full-mark answer.		CMAR → address bus, MDR ↔ data bus
4The address bus carries the memory location from the MAR, while the data bus carries the instruction or data itself.		DThe address of the next instruction is copied from the program counter to the memory address register at the start of fetch.
5The MDR holds the address of the next instruction.		Efetch, decode, execute
6A faster clock speed means the CPU has more memory.		FClock speed is the number of cycles per second, not the amount of memory. A higher speed lets more instructions run each second, so performance rises.

Definitions

fetch-decode-execute

Fill in the Blanks

Complete each line of code by filling in the missing parts.

MAR ← __

MDR ← RAM[___]

CIR ← ___

The MAR sends the address on the _______ bus

Fetch, ______, execute

Spot the Error

Shade in the letter of the line that contains an error.

Question 1

A 1 PC sends address to MAR

B 2 Instruction read into MDR

C 3 MAR copies it to the CIR

D 4 PC is incremented by one

Question 2

A Fetch: address goes PC to MDR

B Fetch: data comes back to MDR

C Decode: CU decodes the CIR

D Execute: ALU or CU acts

Question 3

A Address bus carries the data

B Data bus carries instructions

C Control bus carries signals

Question 4

A The ALU does the calculations

B The ALU decodes instructions

C The ACC stores ALU results

Question 5

A A higher clock speed means

B more cycles each second,

C so more instructions run

D per second, so CPU is slower

Answer Key

Writing exam answers about the CPU

Section A: Quick Questions

A — The address in the PC is copied to the MAR.

A — The address bus carries the memory address from the MAR to RAM.

B — Fetch, then decode, then execute.

A — The instruction read from RAM is placed in the MDR.

B — More cores can process more instructions at the same time, so more work is done.

Section B: Match the Pairs

PC → MAR → The address of the next instruction is copied from the program counter to the memory address register at the start of fetch.

RAM → MDR → CIR → The instruction is read from memory into the memory data register, then copied to the current instruction register.

The correct order of the stages in the cycle must be given in a full-mark answer. → fetch, decode, execute

The address bus carries the memory location from the MAR, while the data bus carries the instruction or data itself. → MAR → address bus, MDR ↔ data bus

The MDR holds the address of the next instruction. → Mixing up the MAR and MDR: the MAR holds the address, the MDR holds the data or instruction fetched from that address.

A faster clock speed means the CPU has more memory. → Clock speed is the number of cycles per second, not the amount of memory. A higher speed lets more instructions run each second, so performance rises.

Section C: Definitions

fetch-decode-execute — A full-mark CPU answer uses exact names for registers, buses and units, and gives the fetch, decode and execute steps in order, e.g. PC to MAR, then MDR, then CIR.

Section D: Fill in the Blanks

MAR ← PC

MDR ← RAM[MAR]

CIR ← MDR

The MAR sends the address on the address bus

Fetch, decode, execute

Section E: Spot the Error

C — The instruction arrives in the MDR, so the MDR copies it to the CIR. The MAR only holds an address, never the instruction.

A — The address from the PC is copied to the MAR, not the MDR. The MDR holds the data that comes back from RAM.

A — The address bus carries memory addresses only. The data bus carries the data and instructions.

B — The control unit (CU) decodes instructions. The ALU does arithmetic and logic.

D — More cycles per second means more instructions are processed each second, so the CPU is faster, not slower.