Program counter (PC)
Name:
Date:
Class:
A
Quick Questions
Shade in the A or B circle for each question.
1. What does the program counter (PC) hold?
2. What normally happens to the PC after each instruction is fetched?
3. Which statement about the PC is correct?
4. The PC holds the value 120. What does 120 represent?
5. A program jumps to a different part of the code. What happens to the PC?
B
Match the Pairs
Draw a line connecting each item on the left to its match on the right.
| Left column | Right column | |
|---|---|---|
| 1PC = PC + 1 | AThe PC holds the address of the next instruction, not the instruction itself, so it cannot store ADD 5. | |
| 2MAR <- PC | BThe program counter increments so it holds the address of the next instruction | |
| 3The PC holds an address, not an instruction, so it stores the location of the next instruction in RAM | CJUMP 50 -> PC = 50 | |
| 4When the program jumps, the PC changes to the address of the jump target instead of just adding 1 | DThe address in the program counter is copied to the memory address register to start a fetch | |
| 5PC = "ADD 5" | EThe PC increments after each fetch so it points to the next instruction. If it stayed the same, the same instruction would be fetched again. | |
| 6After a fetch, the PC stays the same | FPC = 200 |
C
Definitions
Program counter (PC)
D
Fill in the Blanks
Complete each line of code by filling in the missing parts.
1.
MAR ← __
2.
PC ← PC + _
3.
JMP 50
__ ← 50
4.
# PC holds an _______, not an instruction
5.
MAR ← PC
PC ← PC _ 1
E
Spot the Error
Shade in the letter of the line that contains an error.
Question 1
A
PC ← MAR
B
MDR ← RAM[MAR]
C
PC ← PC + 1
D
CIR ← MDR
Question 2
A
PC ← 200
B
MAR ← PC
C
MDR ← RAM[MAR]
D
PC ← PC - 1
Question 3
A
MAR ← PC
B
PC ← RAM[MAR]
C
PC ← PC + 1
D
CIR ← MDR
Question 4
A
CIR ← JMP 50
B
Decode: jump to address 50
C
PC ← PC + 1
D
MAR ← PC
Question 5
A
PC ← 3
B
MAR ← PC
C
MDR ← RAM[MDR]
D
PC ← PC + 1
Answer Key
Program counter (PC)
Section A: Quick Questions
Q1
B — The address of the next instruction to be fetched
Q2
A — It is incremented by 1 to point to the next instruction
Q3
B — The PC stores a memory address
Q4
A — The address in RAM of the next instruction
Q5
A — It is changed to the address of the instruction jumped to
Section B: Match the Pairs
Q1
PC = PC + 1 → The program counter increments so it holds the address of the next instruction
Q2
MAR <- PC → The address in the program counter is copied to the memory address register to start a fetch
Q3
The PC holds an address, not an instruction, so it stores the location of the next instruction in RAM → PC = 200
Q4
When the program jumps, the PC changes to the address of the jump target instead of just adding 1 → JUMP 50 -> PC = 50
Q5
PC = "ADD 5" → The PC holds the address of the next instruction, not the instruction itself, so it cannot store ADD 5.
Q6
After a fetch, the PC stays the same → The PC increments after each fetch so it points to the next instruction. If it stayed the same, the same instruction would be fetched again.
Section C: Definitions
Q1
Program counter (PC) — A register in the CPU that holds the address of the next instruction to be fetched. It increments after each fetch and changes when the program jumps.Section D: Fill in the Blanks
Q1
MAR ← PCQ2
PC ← PC + 1Q3
JMP 50
PC ← 50Q4
# PC holds an address, not an instructionQ5
MAR ← PC
PC ← PC + 1Section E: Spot the Error
Q1
A — A fetch starts by copying the address held in the PC into the MAR, so it should be MAR ← PC. The broken line copies in the wrong direction.
Q2
D — The PC increments after each fetch so it points to the next instruction. It should be PC ← PC + 1, not subtract 1.
Q3
B — The PC holds an address, not an instruction. The instruction read from RAM goes into the MDR, so it should be MDR ← RAM[MAR].
Q4
C — When the program jumps, the PC changes to the jump address. It should be PC ← 50, not a normal increment.
Q5
C — The address of the instruction to read comes from the MAR, which was loaded from the PC. It should be MDR ← RAM[MAR].