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Shade in the A or B circle for each question.
Draw a line connecting each item on the left to its match on the right.
| Left column | Right column | |
|---|---|---|
| 1priority = 1 (power failure) | AThe CPU should pause the lower priority key press ISR and handle the higher priority power failure straight away instead of making it wait. | |
| 2priority = 5 (key press) | BIF new_priority > current_priority THEN pause current ISR | |
| 3If a higher priority interrupt arrives while a lower priority ISR is running, the CPU pauses the lower one and handles the higher one first | CThe order is wrong: the CPU handles the higher priority interrupt first, so the power failure should be handled before the key press. | |
| 4If a new interrupt has a lower priority than the one being handled, it waits until the more urgent interrupt is finished | DIF new_priority < current_priority THEN wait | |
| 5Key press (low priority) is handled before a power failure (high priority) | EA low priority interrupt that can wait or be paused while a more urgent interrupt is handled | |
| 6A power failure interrupt arrives and the CPU ignores it until the key press ISR has finished | FA high priority interrupt that the CPU must handle first because it is urgent |
Complete each line of code by filling in the missing parts.
Shade in the letter of the line that contains an error.
interrupt priority — Each interrupt has a priority level. The CPU handles the most urgent one first, so a power failure can pause the handling of a less urgent key press.IF newPriority > currentPriority THEN
pause(currentISR)
run(newISR)IF powerFailure THEN
pause(keyPressISR)
run(powerFailureISR)IF powerFailure AND keyPress THEN
run(powerFailureISR)
wait(keyPressISR)IF newPriority <= currentPriority THEN
wait(newISR)
ENDIFfinish(powerFailureISR)
resume(keyPressISR)
finish(keyPressISR)