Execute stage
Name:
Date:
Class:
A
Quick Questions
Shade in the A or B circle for each question.
1. What happens in the execute stage of the fetch-decode-execute cycle?
2. Which part of the CPU performs a calculation such as ADD during the execute stage?
3. Where is the result of an ALU calculation usually held straight after it is worked out?
4. An instruction needs a data value that is stored in RAM. What happens in the execute stage?
5. What does a jump instruction do when it is executed?
B
Match the Pairs
Draw a line connecting each item on the left to its match on the right.
| Left column | Right column | |
|---|---|---|
| 1ACC ← ACC + MDR | AThis describes the start of the fetch stage, not execute. In execute the decoded instruction is carried out, e.g. an ALU calculation or a change to the PC. | |
| 2PC ← 20 | BThe ALU adds the data fetched from memory to the value in the accumulator, and the result is held in the ACC | |
| 3During execute, the CPU may fetch further data from RAM by placing an address on the address bus and reading the value back on the data bus | CMAR ← 50, MDR ← RAM[MAR] | |
| 4During execute, the result of an ALU calculation is stored in the accumulator | DACC ← ALU result | |
| 5Execute stage: the instruction is copied from the PC into the MAR | EThe result of an ALU calculation is stored in the accumulator (ACC), not the MAR. The MAR only holds a memory address. | |
| 6Execute: the ALU calculates and the result is stored in the MAR | FA jump instruction is executed, so the program counter is changed and the next fetch comes from address 20 |
C
Definitions
execute
D
Fill in the Blanks
Complete each line of code by filling in the missing parts.
1.
Execute ADD: ACC ← ACC + ___
2.
The result of the ALU is stored in the ___
3.
Execute JMP 20: __ ← 20
4.
LDA 50: address 50 sent on the _______ bus
5.
Execute: ___ adds, ACC stores the result
E
Spot the Error
Shade in the letter of the line that contains an error.
Question 1
A
IF opcode = JMP THEN
B
ALU adds operand to ACC
C
ACC <- result
D
ENDIF
Question 2
A
LDA 40 executes:
B
PC <- 40
C
MDR <- RAM[MAR]
D
ACC <- MDR
Question 3
A
ADD 40 executes:
B
MAR <- 40
C
MDR <- RAM[MAR]
D
ACC <- ACC - MDR
Question 4
A
JMP 90 executes:
B
ACC <- 90
C
Next fetch uses address 90
Question 5
A
STA 50 executes:
B
MDR <- 50
C
MDR <- ACC
D
RAM[MAR] <- MDR
Answer Key
Execute stage
Section A: Quick Questions
Q1
A — The decoded instruction is carried out
Q2
B — The ALU
Q3
A — In the accumulator (ACC)
Q4
A — The data is fetched from RAM using the buses
Q5
B — It changes the value in the PC
Section B: Match the Pairs
Q1
ACC ← ACC + MDR → The ALU adds the data fetched from memory to the value in the accumulator, and the result is held in the ACC
Q2
PC ← 20 → A jump instruction is executed, so the program counter is changed and the next fetch comes from address 20
Q3
During execute, the CPU may fetch further data from RAM by placing an address on the address bus and reading the value back on the data bus → MAR ← 50, MDR ← RAM[MAR]
Q4
During execute, the result of an ALU calculation is stored in the accumulator → ACC ← ALU result
Q5
Execute stage: the instruction is copied from the PC into the MAR → This describes the start of the fetch stage, not execute. In execute the decoded instruction is carried out, e.g. an ALU calculation or a change to the PC.
Q6
Execute: the ALU calculates and the result is stored in the MAR → The result of an ALU calculation is stored in the accumulator (ACC), not the MAR. The MAR only holds a memory address.
Section C: Definitions
Q1
execute — The stage of the fetch-decode-execute cycle where the decoded instruction is carried out, e.g. fetching data, calculating in the ALU, storing in the ACC, or changing the PC.Section D: Fill in the Blanks
Q1
Execute ADD: ACC ← ACC + MDRQ2
The result of the ALU is stored in the ACCQ3
Execute JMP 20: PC ← 20Q4
LDA 50: address 50 sent on the address busQ5
Execute: ALU adds, ACC stores the resultSection E: Spot the Error
Q1
A — The ALU adds the operand to the ACC only when the decoded opcode is ADD. A JMP instruction changes the PC instead. The line should be IF opcode = ADD THEN.
Q2
B — LDA loads data from address 40, so the address goes into the MAR to read RAM. Putting it in the PC would make the CPU jump instead. It should be MAR <- 40.
Q3
D — ADD makes the ALU add the fetched data to the ACC. The line subtracts instead. It should be ACC <- ACC + MDR.
Q4
B — A jump changes the PC so the next fetch reads from the new address. It does not store a value in the ACC. It should be PC <- 90.
Q5
B — The address 50 tells the CPU where to store the ACC value, so it goes into the MAR. The MDR holds the data being written. It should be MAR <- 50.